The input impedance test is fairly simple in concept but can be a challenge in practice. This article explains the concept, briefly reviews the test, gives typical results for ECGs and discusses some testing issues.
What is input impedance?
Measurement of voltage generally requires loading of the circuit in some way. This loading is caused by the input impedance of the meter or amplifier making the measurement.
Modern multimeters typically use 10MΩ input for dc measurements and 1MΩ for ac measurements. This high impedance is usually has negligible effect, but if the input impedance is similar to the circuit impedance significant errors can result. For example, in the circuit shown in Figure 1, the real voltage at Va should be exactly 1.000Vdc, but a meter with 10MΩ input impedance will cause the voltage to fall by about 1.2%, due to the circuit resistance of 240kΩ.
Input impedance can be derived (measured) from the indicated voltage if the circuit is known and resistances are high enough to to make a significant difference relative to noise and resolution of the measurement system. For example in Figure 1, if the supply voltage, Rs and Ra are known, it is possible to work back from the displayed value (0.9881) and calculate an input impedance of 10MΩ.
The test for ECGs is now largely harmonised in all the IEC and ANSI/AAMI standards, and uses a test impedance of 620kΩ in parallel with 4.7nF. Although the requirement is written with a limit of 2.5MΩ minimum input impedance, the actual test only requires the test engineer to confirm if the voltage has dropped by 20% or less, relative a the value shown without the test impedance.
ECGs are ac based measurements so the test is usually performed with an sine wave input signal. Input impedance can also change with frequency, so the IEC standards perform the test at two points: 0.67Hz and 40Hz. Input impedance test is also performed with ±300mV offset, and repeated for each lead electrode configurations in Table 201.103 (10 tests).
Typical results for ECGs
- have no measurable reduction at 0.67Hz
- have mild to significant reduction at 40Hz, sometimes close to the 20% limit
- are not affected by ±300mV dc offset
Issues, experience with the test set up and measurement
Since there are 3 measurements (no test impedance / +300mV / -300mV), two frequencies (0.67/40Hz) and 10 configurations, there are in total 60 measurements to make. In practice, it is reasonable to reduce the number of tests on the basis that tests are representative. For example, Lead I, Lead III, V1 could be comprehensively tested, while Lead II, V1 and V5 could be covered by spot checks at 40Hz only, without ±300mV.
The test is heavily affected by noise. This is a result of the CMRR being degraded due to the high series impedance, or more specifically, the high imbalance in impedance. As this CMRR application note shows, CMRR is heavily dependent on the imbalance impedance.
An imbalance of 620kΩ is 12 times larger than the CMRR test, and there is a proportional degrading of the CMRR by the same factor of 12. This means for example that with a typical test set up having 0.01mV 50/60Hz noise (visible as just 0.1mm @ 10mm/mV) display, an engineer would suddenly find 1.2mm of noise once the 620kΩ/4.7nF is in circuit.
For the 0.67Hz test, the noise appears as a think line. It is possible consider the noise as an artefact and measure the middle point this think line (that is, ignore the noise). This is a valid approach especially as at 0.67Hz, there is usually no measurable reduction, so even increased measurement error from the noise, it is a clear "Pass" result.
However, for the 40Hz test there is no line as such, and the noise is similar frequency resulting in beating, obscuring the result. And the result is often close to the limit. As such, the following is steps are recommended to minimise the noise:
- take extra care with the test environment, check grounding connections between the test circuit, the ECG under test, and the ground plate under the test set up
- During measurement, touch the ground plate (this has often been very effective)
- If noise still appears, use a ground plate above the test set up as well (experience indicates this works well)
- Enable the mains frequency filter; this is best done after at least some effort is made to reduce the noise to using one or more of the methods above to avoid excessive reliance on the filter
- Increase to a higher printing speed, e.g. 50mm/s
Note that if the filter is used it should be on for the whole test. Since 40Hz is close to 50Hz, many simple filters have a measurable reduction at 40Hz. Since the test is proportional (relative), having the filter on does not affect the result as long as it is enabled for both the reference and actual measurement (i.e. with and without the test impedance).